Riscy Pygness for the Cortex-M3

Its been adapted to my own particular needs for a tiny forth that integrates well with a larger C environment that utilizes interrupt handlers for hard timing

Changes

• Code organization that assumes that the SOC will be initialized by a separate C/Assembly function which will then call the forth engine. Forth has ownership of the machine afterwards.
• Register allocation changes for compatibility with the ARM procedure calling standard. You can put a little forth glue around a C or assembly function.
• Machine memory layout is driven by cm3.ld, for better compatility with boot loaders. riscy.asm doesn't contain any hard addresses. It must be linked in last, so that riscy.tcl can insert the compiled forth words into the correct part of the flash image.
• riscy.tcl has been taught to recognize C globals and insert their addresses into the the Forth constant list.

Requirements

1. A Cortex-M3 System with at least 4k of flash and 2k of RAM.
2. A Working assembler and c compiler for Thumb-2. I use GCC configured for eabi.
3. A method for installing the flash image into your device. OpenOCD works well on these devices.
4. Working initialization code for your device that sets up the clocks, the UART, the peripheral ports, and sets up the chip to support the WFI instruction.
5. A Copy of the TI StellarisWare Libraries, if running on a Stellaris Cortex-M3

Changes

• 20111110 - Added support for WFI to reduce CPU usage when idle. This reduces CPU utilization from 100% to 0.3% on a 50MHz Cortex-M3

Download

Sockpuppet API (SAPI) for Cortex-M3

The Sockpuppet API allows language independant access to a boot or interrupt layer. I developed it so that I could remove all of the machine initialization code from Forth, and so that Forth can interface to existing C libraries on the TI/Stellaris and ST Micro Cortex-M3 CPUs. It includes a SVC dispatcher in assembly and a launcher to reside within main().

Download it here: sapi-20120428.tar.gz

- Robert Sexton, robert@thisdomain.